Detection of phase differences between signals is desirable in many applications, such as applications using phase locked loops (PLLs) for clock and data recovery in digital systems, carrier and signal detection, or synthesis in communication systems. Accordingly, accurate and sensitive measurement of phase differences can be useful in phase detection devices. Phase detection devices, however, can demand complex circuit topologies, requiring many components. Such complexity can be problematic in phase detection devices implemented in integrated circuits, where process variations in forming the integrated circuits can lead to variation in the performance of the individual components used in the phase detection device. This can reduce the accuracy and the sensitivity of the phase detector.
Therefore, it is desirable to provide an improved phase detection device.